It was released on April 22, 2003 and was intended to compete in the server market, particularly in the same segment as the Intel Xeon processor.
The two key capabilities
Feature-wise, Opteron combines two important capabilities in a single processor die:
native execution of legacy x86 32-bit applications without speed penalties
native execution of x86-64 64-bit applications (linear-addressing beyond 4 GB RAM)
The first capability is notable because at the time of Opteron's introduction, the only other 64-bit processor architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as all major RISC players (SPARC, DEC, HP-PA, IBM Power, MIPS, etc.) have had 64-bit implementations for many years. In combining these two capabilities, however, the Opteron has earned recognition for its ability to economically run the vast installed base of x86 applications, while simultaneously offering an upgrade-path to 64-bit computing.
The Opteron processor possesses an integrated DDR SDRAM / DDR2 SDRAM(Socket F) memory controller. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.
In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing as instead of having one bank of memory for all CPUs, each CPU has its own memory. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.
In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon. In Xeon systems, the total delivered computing power is often less than the sum of the throughputs of the individual CPUs. For example, a Xeon system may execute two simultaneous tasks each at 90% throughput, or four simultaneous tasks each at 80% throughput. Opteron systems suffer much less drop in aggregate throughput, vindicating AMD's architectural decisions. In particular, the Opteron's integrated memory controller, due to Non-Uniform Memory Access, allows the CPU to access local RAM without using the HyperTransport bus. Even for non-local memory access and interprocessor communication, only the initiator and target are involved, keeping bus-utilization to a minimum. In contrast, multiprocessor Xeon system CPUs share a single common bus for both processor-processor and processor-memory communication. As the number of CPUs increases in a Xeon system, contention for the shared bus causes computing efficiency to drop.
In May of 2005, AMD introduced its first "Multi-Core" Opteron CPUs. At the present time, the term "Multi-Core" at AMD in practice means "dual-core"; each physical Opteron chip actually contains two separate processor cores. This effectively doubles the compute-power available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Since motherboard costs go up dramatically as the number of CPU sockets increases, multicore CPUs now allow much higher performing systems to be built with more affordable motherboards.
AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, the model 875 would be much faster than the model 252, but for single threaded applications the model 252 would perform faster.
Next-Generation AMD Opteron processors are offered in three series: the 1200 Series (up to 1P/2-core), the 2200 Series (up to 2P/4-core), and the 8200 Series (4P/8-core to 8P/16-core). The 1200 Series is built on AMD's new Socket AM2. The 2200 Series and 8200 Series are built on AMD's new Socket F (1207).
AMD has also released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. The Socket 939 Opterons are identical to San Diego core Athlon 64s, but are run at lower clockspeeds than the cores are capable of, making them extremely stable. Since this means that they overclock very well, they are in great demand.
(needs updating-see Socket AM2) Socket AM2 Opterons are available for servers that will only have a single-chip setup. These chips may prove to be as successful as the previous generation socket 939 Opterons due to the Opteron's overclockability. Codenamed Santa Ana, dual core AM2 Opterons feature 2x1mb L2 cache, unlike the majority of their AM2 Athlon 64 X2 cousins which feature 2x512kb L2 cache. Dual core AM2 Opterons, no doubt, face fierce competition from Intel's revamped Xeon processor series.
Socket F (1207)
Socket F is the new socket for the higher-end server-grade Opterons (codename Santa Rosa). Socket F has a 1207 pin layout, as opposed to AM2's 940 pin layout.